1.2 A 2-4-4-2 feedforward neural network example.
2.1 A neural network embedded in a device or subcircuit model.
2.2 Notations associated with a dynamic feedforward neural network.
2.3 Logistic function.
2.4 Neuron nonlinearity
1(sik,δik).2.5 Neuron nonlinearity
2(sik,δik).2.6 Unit step response for various quality factors.
2.7 Linear ramp response for various quality factors.
2.8 Magnitude of transfer function for various quality factors.
2.9 Phase of transfer function for various quality factors.
2.10 Representation of a quasistatic model by a feedforward neural network.
2.11 Parameters for representation of complex-valued zeros.
2.12 Representation of linear dynamic systems.
2.13 Representation of state of general nonlinear dynamic systems.
2.14 Representation of general nonlinear dynamic systems.
2.15 Equivalent SPICE circuits for nonlinear functions.
2.16 Circuit schematic of electrical circuit corresponding to neuron.
3.1 Single-neuron network, frequency transfer 3D parametric plot.
3.2 Single-neuron network, frequency transfer 2D plot.
3.3 Bias-dependent cut-off frequency: magnitude plot.
3.4 Bias-dependent cut-off frequency: phase plot.
4.1 Parameter function τ1(σ1,ik , σ2,ik).
4.2 Parameter function τ2(σ1,ik , σ2,ik).
4.3 Program running in sensitivity self-test mode.
4.4 Program running in neural network learning mode.
4.5 Neural network mapped onto several circuit simulators.
4.6 Single-neuron time domain learning.
4.7 Pstar model generation and simulation results.
4.8 MOST model 901 dc drain current.
4.9 Neural network dc drain current.
4.10 Differences between MOST model 901 and neural network.
4.11 MOSFET modelling error as a function of iteration count.
4.12 Amplifier circuit and neural macromodel.
4.13 Macromodelling of circuit admittance, Y 11.
4.14 Macromodelling of circuit admittance, Y 21.
4.15 Macromodelling of circuit admittance, Y 12.
4.16 Macromodelling of circuit admittance, Y 22.
4.17 Overview of macromodelling errors.
4.18 Equivalent circuit for packaged bipolar transistor.
4.19 Bipolar transistor modelling error as a function of iteration count.
4.20 Neural network model versus bipolar discrete device model.
4.21 Block schematic of video filter circuit.
4.22 Schematic of video filter section.
4.23 A 2-2-2-2-2-2 feedforward neural network.
4.24 Schematic of video filter interfacing circuitry.
4.25 Schematic of video filter biasing circuitry.
4.26 Macromodelling of video filter, time domain overview.
4.27 Macromodelling of video filter, enlargement plot 1.
4.28 Macromodelling of video filter, enlargement plot 2.
4.29 Macromodelling of video filter, frequency domain H00.
4.30 Macromodelling of video filter, frequency domain H10.
4.31 Video filter modelling error as a function of iteration count.
D.1 Backward Euler integration of ˙x = 2π sin(2πt).
D.2 Trapezoidal integration of ˙ x = 2π sin(2πt).
D.3 Backward Euler integration of ˙ x = 2π cos(2πt).
D.4 Trapezoidal integration of ˙ x = 2π cos(2πt).